© 2005 Fairchild Semiconductor Corporation DS011601 www.fairchildsemi.com
May 1993
Revised February 2005
7
4
L
VX04
Low V
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l
t
age
Hex I
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74LVX04
Low Voltage Hex Inverter
General Description
The LVX04 contains six inverters. The inputs tolerate volt-
ages up to 7V allowing the interface of 5V systems to 3V
systems.
Features
a73 Input voltage level translation from 5V to 3V
a73 Ideal for low power/low noise 3.3V applications
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance

Ordering Code
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number
Package
Package Description
Number
74LVX04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LVX04SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX04MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVX04MTCX_NL
(Note 1)
MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Pin Names Description
A
n
Inputs
O
n
Outputs