74LVTH646
器件描述：Low Voltage Octal Transceiver/Register with 3-STATE Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：78.46KB，共8页
Sponsor by e络盟器件资料摘要：
© 2000 Fairchild Semiconductor Corporation DS012017 www.fairchildsemi.com
November 1999
Revised May 2000
7
4
L
V
TH64
6
Low V
o
l
t
a
g
e
Oct
a
l T
r
ans
ceiver
/Regi
s
t
e
r w
i
th 3-
ST
A
T
E O
u
t
put
s
74LVTH646
Low Voltage Octal Transceiver/Register
with 3-STATE Outputs
General Description
The LVTH646 consists of registered bus transceiver cir-
cuits, D-type flip-flops, and control circuitry providing multi-
plexed transmission of data directly from the input bus or
from the internal storage registers. Data on the A or B bus
will be loaded into the respective registers on the LOW-to-
HIGH transition of the appropriate clock pin (CPAB or
CPBA). (See Functional Description)
The LVTH646 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
The bus transceivers are designed for low-voltage (3.3V)
V
CC
applications, but with the capability to provide a TTL
interface to a 5V environment. The LVTH646 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining low
power dissipation.
Features
a73 Input and output interface capability to systems at
5V V
CC
a73 Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
a73 Live insertion/extraction permitted
a73 Power Up/Down high impedance provides glitch-free
bus loading
a73 Outputs source/sink −32 mA/+64 mA
a73 Functionally compatible with the 74 series 646
a73 Latch-up performance exceeds 500 mA
Ordering Code:
Devices also available in Tape and Reel. Specify by appending letter suffix “X” to the ordering code.
Logic Symbols
IEEE/IEC
Order Number Package Number Package Description
74LVTH646WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74LVTH646MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
November 1999
Revised May 2000
7
4
L
V
TH64
6
Low V
o
l
t
a
g
e
Oct
a
l T
r
ans
ceiver
/Regi
s
t
e
r w
i
th 3-
ST
A
T
E O
u
t
put
s
74LVTH646
Low Voltage Octal Transceiver/Register
with 3-STATE Outputs
General Description
The LVTH646 consists of registered bus transceiver cir-
cuits, D-type flip-flops, and control circuitry providing multi-
plexed transmission of data directly from the input bus or
from the internal storage registers. Data on the A or B bus
will be loaded into the respective registers on the LOW-to-
HIGH transition of the appropriate clock pin (CPAB or
CPBA). (See Functional Description)
The LVTH646 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
The bus transceivers are designed for low-voltage (3.3V)
V
CC
applications, but with the capability to provide a TTL
interface to a 5V environment. The LVTH646 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining low
power dissipation.
Features
a73 Input and output interface capability to systems at
5V V
CC
a73 Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
a73 Live insertion/extraction permitted
a73 Power Up/Down high impedance provides glitch-free
bus loading
a73 Outputs source/sink −32 mA/+64 mA
a73 Functionally compatible with the 74 series 646
a73 Latch-up performance exceeds 500 mA
Ordering Code:
Devices also available in Tape and Reel. Specify by appending letter suffix “X” to the ordering code.
Logic Symbols
IEEE/IEC
Order Number Package Number Package Description
74LVTH646WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74LVTH646MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide