© 2000 Fairchild Semiconductor Corporation DS012023 www.fairchildsemi.com
January 2000
Revised January 2000
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74LVTH16646
Low Voltage 16-Bit Transceiver/Register
with 3-STATE Outputs
General Description
The LVTH16646 contains sixteen non-inverting bidirec-
tional registered bus transceivers providing multiplexed
transmission of data directly from the input bus or from the
internal storage registers. Each byte has separate control
inputs which can be shorted together for full 16-bit opera-
tion. The DIR inputs determine the direction of data flow
through the device. The CPAB and CPBA inputs load data
into the registers on the LOW-to-HIGH transition (see
Functional Description).
The LVTH16646 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These transceivers are designed for low-voltage (3.3V)
V
CC
applications, but with the capability to provide a TTL
interface to a 5V environment. The LVTH16646 is fabri-
cated with an advanced BiCMOS technology to achieve
high speed operation similar to 5V ABT while maintaining
low power dissipation.
Features
a73 Input and output interface capability to systems at
5V V
CC
a73 Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
a73 Live insertion/extraction permitted
a73 Power Up/Down high impedance provides
glitch-free bus loading
a73 Outputs source/sink −32 mA/+64 mA
a73 Functionally compatible with the 74 series 16646
a73 Latch-up performance exceeds 500 mA

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Order Number Package Number Package Description
74LVTH16646MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
74LVTH16646MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide