74LVQ86
QUAD EXCLUSIVE OR GATE

February 1999
n HIGH SPEED: t
PD
= 5.5 ns (TYP.) at V
CC
=3.3V
n COMPATIBLEWITH TTL OUTPUTS
n LOW POWER DISSIPATION:
I
CC
=2 µA (MAX.) at T
A
=25
o
C
n LOW NOISE:
V
OLP
= 0.3 V (TYP.) at V
CC
=3.3V
n 75Ω TRANSMISSIONLINE DRIVING
CAPABILITY
n SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL = 12 mA (MIN)
n PCI BUS LEVELSGUARANTEED AT 24mA
n BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
n OPERATING VOLTAGE RANGE:
VCC (OPR)= 2V to 3.6V (1.2VData Retention)
n PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 86
n IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The LVQ86 is a low voltage CMOS QUAD
EXCLUSIVE OR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power and low noise 3.3V applications.
It has better speed performance at 3.3V than 5V
LS-TTL family combined with the true CMOS low
power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES :
74LVQ86M 74LVQ86T
M
(Micro Package)
T
(TSSOP Package)
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