74LVQ573
Low Voltage Octal Latch with 3-STATE Outputs
General Description
The LVQ573 is a high-speed octal latch with buffered com-
mon Latch Enable (LE) and buffered common Output Enable
(OE) inputs. The LVQ573 is functionally identical to the
LVQ373 but with inputs and outputs on opposite sides of the
package.
Features
n Ideal for low power/low noise 3.3V applications
n Implements patented EMI reduction circuitry
n Available in SOIC JEDEC, SOIC EIAJ, and QSOP
packages
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Improved latch-up immunity
n Guaranteed incident wave switching into 75Ω
n 4 kV minimum ESD immunity
Ordering Code:
Order Number Package Number Package Description
74LVQ573SC M20B 20-Lead (0.300" Wide) Molded Small Outline Package, SOIC, JEDEC
74LVQ573SJ M20D 20-Lead Molded Shrink Small Outline Package, SOIC, EIAJ
74LVQ573QSC MQA20 20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP, JEDEC
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols Connection Diagram
Pin Descriptions
Pin Names Description
D
0
–D
7
Data Inputs
LE Latch Enable Input
OE 3-STATE Output Enable Input
O
0
–O
7
3-STATE Latch Outputs
DS011361-1
IEEE/IEC
DS011361-2
Pin Assignment for
SOIC and QSOP
DS011361-3
May 1998
74L
VQ573
Low
V
oltage
Octal
Latch
with
3-ST
A
T
E
Outputs
© 1998 Fairchild Semiconductor Corporation DS011361 www.fairchildsemi.com