HD74LV175A
Quad. D-type Flip-Flops with Clear
ADE-205-270 (Z)
1st Edition
April 1999
Description
Information at the D inputs of the HD74LV175A is transferred to the Q and Q outputs on the positive going
edge of the clock pulse. Both true and complement outputs from each flip-flop are externally available.
All four flip-flops are controlled by a common clock and common clear. Clearing is accomplished by a
negative pulse at the clear input. All four Q outputs are cleared to a logic low level and all four Q outputs
to a logic high level. Low-voltage and high-speed operation is suitable for battery-powered products (e.g.,
notebook computers), and the low-power consumption extends the battery life.
Features
• V
CC
= 2.0 V to 5.5 V operation
• All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
• All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
• Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25 C)
• Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25 C)
• Output current – 6 mA (@V
CC
= 3.0 V to 3.6 V), – 12 mA (@V
CC
= 4.5 V to 5.5 V)
Function Table
Inputs Outputs
CLR CLK D Q Q
LX XL H
H › HH L
H › LL H
H fl X no change no change
Note: H: High level
L: Low level
X: Immaterial
› : Low to high transition
fl : High to low transition