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厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

74LV175

器件描述:QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
器件厂商:TI [Texas Instruments]
厂商主页:http://www.ti.com/
文件大小:154.41KB,共8页
Sponsor by e络盟
器件资料摘要:
SN54LV175A, SN74LV175A
QUADRUPLE D-TYPE FLIP-FLOPS
WITH CLEAR

SCLS400B – APRIL 1998 – REVISED OCTOBER 1998
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 EPIC  (Enhanced-Performance Implanted
CMOS) Process
C0068 Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25°C
C0068 Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25°C
C0068 Contain Four Flip-Flops With Double-Rail
Outputs
C0068 Applications Include:
– Buffer/Storage Registers
– Shift Registers
– Pattern Generators
C0068 Latch-Up Performance Exceeds 250 mA Per
JESD 17
C0068 ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
C0068 Package Options Include Plastic
Small-Outline (D, NS), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), and
Thin Shrink Small-Outline (PW) Packages,
Ceramic Flat (W) Packages, Chip Carriers
(FK), and DIPs (J)
description
The ’LV175A devices are quadruple D-type
flip-flops designed for 2-V to 5.5-V V
CC
operation.
These devices have a direct clear (CLR) input and feature complementary outputs from each flip-flop.
Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the
positive-going edge of the clock (CLK) pulse.
Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the
positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
The SN54LV175A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LV175A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS OUTPUTS
CLR CLK D Q Q
L X X L H
H ↑ HHL
H↑LLH
HLXQ
0
Q
0
SN54LV175A ...J OR W PACKAGE
SN74LV175A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
SN54LV175A . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CLR
1Q
1Q
1D
2D
2Q
2Q
GND
V
CC
4Q
4Q
4D
3D
3Q
3Q
CLK
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4Q
4D
NC
3D
3Q
1Q
1D
NC
2D
2Q
1Q CLR NC
CLK
3Q
4Q
2Q
GND
NC
V
CC
NC – No internal connection

Copyright  1998, Texas Instruments Incorporated
EPIC is a trademark of Texas Instruments Incorporated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.