 Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1 Publication Order Number:
SN74LS74A/D
C0083C0078C0055C0052C0076C0083C0055C0052C0065
C0068C0117C0097C0108 C0068C0045C0084C0121C0112C0101 C0080C0111C0115C0105C0116C0105C0118C0101
C0069C0100C0103C0101C0045C0084C0114C0105C0103C0103C0101C0114C0101C0100 C0070C0108C0105C0112C0045C0070C0108C0111C0112
The SN74LS74A dual edge-triggered flip-flop utilizes Schottky
TTL circuitry to produce high speed D-type flip-flops. Each flip-flop
has individual clear and set inputs, and also complementary Q and Q
outputs.
Information at input D is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a
voltage level of the clock pulse and is not directly related to the
transition time of the positive-going pulse. When the clock input is at
either the HIGH or the LOW level, the D input signal has no effect.
MODE SELECT – TRUTH TABLE
OPERATING MODE
INPUTS OUTPUTS

S
D
S
D
D Q Q
Set
Reset (Clear)
*Undetermined
Load “1” (Set)
Load “0” (Reset)
L
H
L
H
H
H
L
L
H
H
X
X
X
h
l
H
L
H
H
L
L
H
H
L
H
* Both outputs will be HIGH while both S
D
and C
D
are LOW, but the output
states are unpredictable if S
D
and C
D
go HIGH simultaneously. If the levels
at the set and clear are near V
IL
maximum then we cannot guarantee to meet
the minimum level for V
OH
.
H, h = HIGH Voltage Level
L, I = LOW Voltage Level
X = Don’t Care
l, h (q) = Lower case letters indicate the state of the referenced input
i, h (q) = (or output) one set-up time prior to the HIGH to LOW clock transition.
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
CC
Supply Voltage 4.75 5.0 5.25 V
T
A
Operating Ambient
Temperature Range
0 25 70 °C
I
OH
Output Current – High –0.4 mA
I
OL
Output Current – Low 8.0 mA
LOW
POWER
SCHOTTKY
Device Package Shipping
ORDERING INFORMATION
SN74LS74AN 14 Pin DIP 2000 Units/Box
SN74LS74AD 14 Pin
SOIC
D SUFFIX
CASE 751A
http://onsemi.com
2500/Tape & Reel
PLASTIC
N SUFFIX
CASE 646
14
1
14
1