© 2000 Fairchild Semiconductor Corporation DS009056 www.fairchildsemi.com
August 1986
Revised March 2000
DM74LS645
Octa
l
Bus T
r
anscei
ver
DM74LS645
Octal Bus Transceiver
General Description
These octal bus transceivers are designed for asynchro-
nous two-way communication between data buses. The
devices transmit data from the A bus to the B bus or from
the B bus to the A bus depending upon the level at the
direction control (DIR) input. The enable input (G) can be
used to disable the device so that the buses are effectively
isolated.
Features
a73 Bi-directional bus transceivers in high-density 20-pin
packages
a73 Hysteresis at bus inputs improves noise margins
a73 3-STATE outputs

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Function Table
H = HIGH Level
L = LOW Level
X = Irrelevant
Order Number Package Number Package Description
DM74LS645WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS645N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Control
Inputs DM74LS645
G DIR
L L B data to A bus
L H A data to B bus
H X Isolation