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74LS251

器件描述:3-STATE 1-of-8 Line Data Selector/Multiplexer
器件厂商:FAIRCHILD [Fairchild Semiconductor]
文件大小:58.73KB,共6页
Sponsor by e络盟
器件资料摘要:
© 2000 Fairchild Semiconductor Corporation DS006415 www.fairchildsemi.com
August 1986
Revised March 2000
DM74LS251
3-
ST
A
T
E
1-of
-8
Li
ne Dat
a
Sel
ect
or/
M
ul
t
i
pl
exer
DM74LS251
3-STATE 1-of-8 Line Data Selector/Multiplexer
General Description
These data selectors/multiplexers contain full on-chip
binary decoding to select one-of-eight data sources, and
feature a strobe-controlled 3-STATE output. The strobe
must be at a low logic level to enable these devices. The 3-
STATE outputs permit direct connection to a common bus.
When the strobe input is HIGH, both outputs are in a high-
impedance state in which both the upper and lower transis-
tors of each totem-pole output are OFF, and the output nei-
ther drives nor loads the bus significantly. When the strobe
is LOW, the outputs are activated and operate as standard
TTL totem-pole outputs.
To minimize the possibility that two outputs will attempt to
take a common bus to opposite logic levels, the output con-
trol circuitry is designed so that the average output disable
time is shorter than the average output enable time.
Features
a73 3-STATE version of DM74LS151
a73 Interface directly with system bus
a73 Perform parallel-to-serial conversion
a73 Permit multiplexing from N-lines to one line
a73 Complementary outputs provide true and inverted data
a73 Maximum number of common outputs: 129
a73 Typical propagation delay time (D to Y): 17 ns
a73 Typical power dissipation: 35 mW

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Function Table
H = HIGH Logic Level
L = LOW Logic Level
X = Don't Care
Z = High Impedance (OFF)
D0, D1…D7 = The level of the respective D input
Order Number Package Number Package Description
DM74LS251M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS251N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Outputs
Select Strobe
YW
CBA S
XXX H Z Z
LLL L D0D0
LLH L D1D1
LHL L D2D2
LHH L D3D3
HLL L D4D4
HLH L D5D5
HHL L D6D6
HHH L D7D7