74LS148
器件描述：10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS
器件厂商：MOTOROLA [Motorola, Inc]
文件大小：231.44KB，共7页
Sponsor by e络盟器件资料摘要：
5-245
FAST AND LS TTL DATA
10-LINE-TO-4-LINE
AND 8-LINE-TO-3-LINE
PRIORITY ENCODERS
The SN54/74LS147 and the SN54/74LS148 are Priority Encoders. They
provide priority decoding of the inputs to ensure that only the highest order
data line is encoded. Both devices have data inputs and outputs which are
active at the low logic level.
The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied
decimal zero condition does not require an input condition because zero is
encoded when all nine data lines are at a high logic level.
The LS148 encodes eight data lines to three-line (4-2-1) binary (octal). By
providing cascading circuitry (Enable Input EI and Enable Output EO) octal
expansion is allowed without needing external circuitry.
The SN54/74LS748 is a proprietary Motorola part incorporating a built-in
deglitcher network which minimizes glitches on the GS output. The glitch
occurs on the negative going transition of the EI input when data inputs 0–7
are at logical ones.
The only dc parameter differences between the LS148 and the LS748 are
that (1) Pin 10 (input 0) has a fan-in of 2 on the LS748 versus a fan-in of 1 on
the LS148; (2) Pins 1, 2, 3, 4, 11, 12 and 13 (inputs 1, 2, 3, 4, 5, 6, 7) have a
fan-in of 3 on the LS748 versus a fan-in of 2 on the LS148.
The only ac difference is that t
PHL
from EI to EO is changed from 40 to
45 ns.
SN54/74LS147
(TOP VIEW)
SN54/74LS148
SN54/74LS748
(TOP VIEW)
C0052 C0053 C0054 C0055 C0056 C0067 C0066 C0071C0078C0068
C0068 C0051 C0050 C0049 C0057 C0065C0086
C0067C0067
C0078C0067
C0049C0052 C0049C0051 C0049C0050 C0049C0049 C0049C0048 C0057
C0049 C0050 C0051 C0052 C0053 C0054 C0055
C0049C0054 C0049C0053
C0056
C0068 C0051 C0050 C0049 C0057
C0065C0052
C0053 C0054 C0055 C0056 C0067 C0066
C0079C0085C0084C0080C0085C0084 C0073C0078C0080C0085C0084C0083 C0079C0085C0084C0080C0085C0084
C0073C0078C0080C0085C0084C0083 C0079C0085C0084C0080C0085C0084C0083
C0052 C0053 C0054 C0055 C0069C0049 C0065C0050 C0065C0049 C0071C0078C0068
C0086
C0067C0067
C0069C0079 C0071C0083 C0051 C0050 C0049 C0048 C0065C0048
C0049C0052 C0049C0051 C0049C0050 C0049C0049 C0049C0048 C0057
C0049 C0050 C0051 C0052 C0053 C0054 C0055
C0049C0054 C0049C0053
C0056
C0069C0079 C0071C0083 C0051 C0050 C0049 C0048
C0065C0048C0052
C0053 C0054 C0055 C0069C0073 C0065C0050 C0065C0049
C0079C0085C0084C0080C0085C0084C0083 C0073C0078C0080C0085C0084C0083 C0079C0085C0084C0080C0085C0084
C0073C0078C0080C0085C0084C0083 C0079C0085C0084C0080C0085C0084C0083
SN54/74LS147
SN54/74LS148
SN54/74LS748
10-LINE-TO-4-LINE
AND 8-LINE-TO-3-LINE
PRIORITY ENCODERS
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
16
1
D SUFFIX
SOIC
CASE 751B-03
FAST AND LS TTL DATA
10-LINE-TO-4-LINE
AND 8-LINE-TO-3-LINE
PRIORITY ENCODERS
The SN54/74LS147 and the SN54/74LS148 are Priority Encoders. They
provide priority decoding of the inputs to ensure that only the highest order
data line is encoded. Both devices have data inputs and outputs which are
active at the low logic level.
The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied
decimal zero condition does not require an input condition because zero is
encoded when all nine data lines are at a high logic level.
The LS148 encodes eight data lines to three-line (4-2-1) binary (octal). By
providing cascading circuitry (Enable Input EI and Enable Output EO) octal
expansion is allowed without needing external circuitry.
The SN54/74LS748 is a proprietary Motorola part incorporating a built-in
deglitcher network which minimizes glitches on the GS output. The glitch
occurs on the negative going transition of the EI input when data inputs 0–7
are at logical ones.
The only dc parameter differences between the LS148 and the LS748 are
that (1) Pin 10 (input 0) has a fan-in of 2 on the LS748 versus a fan-in of 1 on
the LS148; (2) Pins 1, 2, 3, 4, 11, 12 and 13 (inputs 1, 2, 3, 4, 5, 6, 7) have a
fan-in of 3 on the LS748 versus a fan-in of 2 on the LS148.
The only ac difference is that t
PHL
from EI to EO is changed from 40 to
45 ns.
SN54/74LS147
(TOP VIEW)
SN54/74LS148
SN54/74LS748
(TOP VIEW)
C0052 C0053 C0054 C0055 C0056 C0067 C0066 C0071C0078C0068
C0068 C0051 C0050 C0049 C0057 C0065C0086
C0067C0067
C0078C0067
C0049C0052 C0049C0051 C0049C0050 C0049C0049 C0049C0048 C0057
C0049 C0050 C0051 C0052 C0053 C0054 C0055
C0049C0054 C0049C0053
C0056
C0068 C0051 C0050 C0049 C0057
C0065C0052
C0053 C0054 C0055 C0056 C0067 C0066
C0079C0085C0084C0080C0085C0084 C0073C0078C0080C0085C0084C0083 C0079C0085C0084C0080C0085C0084
C0073C0078C0080C0085C0084C0083 C0079C0085C0084C0080C0085C0084C0083
C0052 C0053 C0054 C0055 C0069C0049 C0065C0050 C0065C0049 C0071C0078C0068
C0086
C0067C0067
C0069C0079 C0071C0083 C0051 C0050 C0049 C0048 C0065C0048
C0049C0052 C0049C0051 C0049C0050 C0049C0049 C0049C0048 C0057
C0049 C0050 C0051 C0052 C0053 C0054 C0055
C0049C0054 C0049C0053
C0056
C0069C0079 C0071C0083 C0051 C0050 C0049 C0048
C0065C0048C0052
C0053 C0054 C0055 C0069C0073 C0065C0050 C0065C0049
C0079C0085C0084C0080C0085C0084C0083 C0073C0078C0080C0085C0084C0083 C0079C0085C0084C0080C0085C0084
C0073C0078C0080C0085C0084C0083 C0079C0085C0084C0080C0085C0084C0083
SN54/74LS147
SN54/74LS148
SN54/74LS748
10-LINE-TO-4-LINE
AND 8-LINE-TO-3-LINE
PRIORITY ENCODERS
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
16
1
D SUFFIX
SOIC
CASE 751B-03