74LS11
器件描述:Triple 3-Input AND Gate
文件大小:46.02KB,共4页
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器件资料摘要:
© 2000 Fairchild Semiconductor Corporation DS006350 www.fairchildsemi.com
August 1986
Revised March 2000
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DM74LS11
Triple 3-Input AND Gate
General Description
This device contains three independent gates each of
which performs the logic AND function.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Function Table
Y = ABC
H = HIGH Logic Level
L = LOW Logic Level
X = Either LOW or HIGH Logic Level
Order Number Package Number Package Description
DM74LS11M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS11N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Output
ABCY
XXLL
XLXL
LXXL
HHH