74LCXH16374
器件描述：Low Voltage 16-Bit D-Type Flip-Flop with Bushold
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：204.82KB，共10页
Sponsor by e络盟器件资料摘要：
© 2002 Fairchild Semiconductor Corporation DS500441 www.fairchildsemi.com
February 2001
Revised June 2002
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74LCXH16374
Low Voltage 16-Bit D-Type Flip-Flop with Bushold
General Description
The LCXH16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and Output Enable (OE) are common to each byte
and can be shorted together for full 16-bit operation.
The LCXH16374 is designed for low voltage (2.5V or 3.3V)
V
CC
applications.
The LCXH16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
The LCXH16374 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
Features
a73 5V tolerant control inputs and outputs
a73 2.3V–3.6V V
CC
specifications provided
a73 6.2 ns t
PD
max (V
CC
= 3.3V), 20 µA I
CC
max
a73 Bushold on inputs eliminating the need for external
pull-up/pull-down resistors
a73 Power down high impedance outputs
a73 ±24 mA output drive (V
CC
= 3.0V)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 200V
a73 Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
GTO is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74LCXH16374G
(Note 1)(Note 3)
BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LCXH16374MEA
(Note 2)
MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LCXH16374MTD
(Note 2)
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
February 2001
Revised June 2002
7
4
LCXH
1
6374
Lo
w
V
o
lt
age
1
6
-Bi
t
D-T
y
pe Fli
p
-F
lop w
i
t
h
Bushol
d
74LCXH16374
Low Voltage 16-Bit D-Type Flip-Flop with Bushold
General Description
The LCXH16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and Output Enable (OE) are common to each byte
and can be shorted together for full 16-bit operation.
The LCXH16374 is designed for low voltage (2.5V or 3.3V)
V
CC
applications.
The LCXH16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
The LCXH16374 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
Features
a73 5V tolerant control inputs and outputs
a73 2.3V–3.6V V
CC
specifications provided
a73 6.2 ns t
PD
max (V
CC
= 3.3V), 20 µA I
CC
max
a73 Bushold on inputs eliminating the need for external
pull-up/pull-down resistors
a73 Power down high impedance outputs
a73 ±24 mA output drive (V
CC
= 3.0V)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 200V
a73 Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
GTO is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74LCXH16374G
(Note 1)(Note 3)
BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LCXH16374MEA
(Note 2)
MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LCXH16374MTD
(Note 2)
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide