© 2000 Fairchild Semiconductor Corporation DS500248 www.fairchildsemi.com
September 2000
Revised September 2000
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74LCXH16244
Low Voltage 16-Bit Buffer/Line Driver with Bushold
General Description
The LCXH16244 contains sixteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The LCXH16244 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The LCXH16244 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCXH16244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
a73 5V tolerant control inputs and outputs
a73 2.3V–3.6V V
CC
specifications provided
a73 4.5 ns t
PD
max (V
CC
= 3.0V), 20 µA I
CC
max
a73 Bushold on inputs eliminates the need for external
pull-up/pull-down resistors
a73 Power down high impedance inputs and outputs
a73 ±24 mA output drive (V
CC
= 3.0V)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 200V

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Logic Symbol
Pin Descriptions
Order Number Package Number Package Description
74LCXH16244MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
74LCXH16244MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
I
0
–I
15
Bushold Inputs
O
0
–O
15
Outputs