© 2001 Fairchild Semiconductor Corporation DS012635 www.fairchildsemi.com
January 1996
Revised March 2001
7
4
LCX821
Low V
o
lt
age
10
-Bi
t
D
-
T
y
pe Fli
p
-Fl
op w
i
th

5V T
o
ler
a
nt Input
s and
Out
puts
74LCX821
Low Voltage 10-Bit D-Type Flip-Flop
with 5V Tolerant Inputs and Outputs
General Description
The LCX821 consists of ten D-type Flip-Flops with
3-STATE outputs for bus organized system applications.
The device is designed for low voltage (2.5V or 3.3V) V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX821 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
a73 5V tolerant inputs and outputs
a73 2.3V–3.6V V
CC
specifications provided
a73 7.0 ns t
PD
max (V
CC
= 3.3V), 10 µA I
CC
max
a73 Power-down high impedance inputs and outputs
a73 Supports live insertion/withdrawal (Note 1)
a73 ±24 mA output drive (V
CC
= 3.0V)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human Body Model > 2000V
Machine Model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74LCX821WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LCX821MSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LCX821MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide