C0077C0079C0084C0079C0082C0079C0076C0065
SEMICONDUCTOR TECHNICAL DATA
1 REV 3 Motorola, Inc. 1996
11/96
C0076C0111C0119C0045C0086C0111C0108C0116C0097C0103C0101 C0067C0077C0079C0083
C0079C0099C0116C0097C0108 C0068C0045C0084C0121C0112C0101 C0070C0108C0105C0112C0045C0070C0108C0111C0112
C0087C0105C0116C0104 C0053C0086C0045C0084C0111C0108C0101C0114C0097C0110C0116 C0073C0110C0112C0117C0116C0115 C0097C0110C0100 C0079C0117C0116C0112C0117C0116C0115
C0040C0051C0045C0083C0116C0097C0116C0101C0044 C0078C0111C0110C0045C0073C0110C0118C0101C0114C0116C0105C0110C0103C0041
The MC74LCX374 is a high performance, non–inverting octal D–type
flip–flop operating from a 2.7 to 3.6V supply. High impedance TTL
compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
performance. A V
I
specification of 5.5V allows MC74LCX374 inputs to be
safely driven from 5V devices.
The MC74LCX374 consists of 8 edge–triggered flip–flops with
individual D–type inputs and 3–state true outputs. The buffered clock and
buffered Output Enable (OE) are common to all flip–flops. The eight
flip–flops will store the state of individual D inputs that meet the setup and
hold time requirements on the LOW–to–HIGH Clock (CP) transition. With
the OE LOW, the contents of the eight flip–flops are available at the
outputs. When the OE is HIGH, the outputs go to the high impedance
state. The OE input level does not affect the operation of the flip–flops.
• Designed for 2.7 to 3.6V V
CC
Operation
• 5V Tolerant — Interface Capability With 5V TTL Logic
• Supports Live Insertion and Withdrawal
• I
OFF
Specification Guarantees High Impedance When V
CC
= 0V
• LVTTL Compatible
• LVCMOS Compatible
• 24mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (10µA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500mA
• ESD Performance: Human Body Model >2000V; Machine Model >200V
Pinout: 20–Lead (Top View)
1920 18 17 16 15 14
21 34567
V
CC
13
8
12
9
11
10
O7 D7 D6 O6 O5 D5 D4 O4 CP
OE O0 D0 D1 O1 O2 D2 D3 O3 GND
DW SUFFIX
PLASTIC SOIC
CASE 751D–04
DT SUFFIX
PLASTIC TSSOP
CASE 948E–02
20
1
20
1
M SUFFIX
PLASTIC SOIC EIAJ
CASE 967–01
20
1
SD SUFFIX
PLASTIC SSOP
CASE 940C–03
20
1
PIN NAMES
Function
Output Enable Input
Clock Pulse Input
Data Inputs
3–State Outputs
Pins
OE
CP
D0–D7
O0–O7
C0077C0067C0055C0052C0076C0067C0088C0051C0055C0052
LOW–VOLTAGE CMOS
OCTAL D–TYPE FLIP–FLOP