© 2001 Fairchild Semiconductor Corporation DS500454 www.fairchildsemi.com
February 2001
Revised February 2001
7
4
LCX27 Low
V
o
l
t
a
ge T
r
ipl
e

3-I
nput
NOR Gate
wit
h

5V T
o
l
e
rant
I
nputs
74LCX27
Low Voltage Triple 3-Input NOR Gate
with 5V Tolerant Inputs
General Description
The LCX27 contains three 3-input NOR gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
The 74LCX27 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
a73 5V tolerant inputs
a73 2.3V–3.6V V
CC
specifications provided
a73 4.9 ns t
PD
max (V
CC
= 3.3V), 10 µA I
CC
max
a73 Power down high impedance inputs and outputs
a73 ±24 mA output drive (V
CC
= 3.0V)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 200V

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions Truth Table
O
n
= A
n
+ B
n
+ C
n
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Order Number Package Number Package Description
74LCX27M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74LCX27SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX27MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
A
n
, B
n
, C
n
Inputs
O
n
Outputs
Inputs Output
A
n
B
n
C
n
O
n
HXXL
XHX
XXHL
LLLH