January 1996
Revised April 1999
7
4LCX16821 Low
V
o
lt
age 20-Bi
t D-T
ype Fli
p
-
F
lop wit
h

5V T
o
ler
ant I
nputs and O
u
t
put
s
© 1999 Fairchild Semiconductor Corporation DS012634.prf www.fairchildsemi.com
74LCX16821
Low Voltage 20-Bit D-Type Flip-Flop with 5V Tolerant
Inputs and Outputs
General Description
The LCX16821 contains twenty non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is designed for low voltage (2.5V
or 3.3V) V
CC
applications with capability of interfacing to a
5V signal environment.
The LCX16821 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
a73 5V tolerant inputs and outputs
a73 2.3V–3.6V V
CC
specifications provided
a73 6.2 ns t
PD
max (V
CC
= 3.3V), 20 µA I
CC
max
a73 Power down high impedance inputs and outputs
a73 Supports live insertion/withdrawal (Note 1)
a73 ±24 mA output drive (V
CC
= 3.0V)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.

Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number Package Number Package Description
74LCX16821MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LCX16821MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
CLK
n
Clock Input
D
0
–D
19
Inputs
O
0
–O
19
Outputs