C0077C0079C0084C0079C0082C0079C0076C0065
SEMICONDUCTOR TECHNICAL DATA
1 REV 6 Motorola, Inc. 1995
10/95
C0084C0114C0105C0112C0108C0101 C0051C0045C0073C0110C0112C0117C0116 C0079C0082 C0071C0097C0116C0101
High–Performance Silicon–Gate CMOS
The MC74HC4075 is identical in pinout to the MC14075B. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 42 FETs or 10.5 Equivalent Gates
LOGIC DIAGRAM
A1
13
12
11
5
4
3
8
2
1
B1
C1
A2
B2
C2
A3
B3
C3
10
6
9
Y3
Y2
Y1
Y = A + B + C
PIN 14 = V
CC
PIN

7

=

GND
C0077C0067C0055C0052C0072C0067C0052C0048C0055C0053
FUNCTION TABLE
PIN ASSIGNMENT
11
12
13
14
8
9
105
4
3
2
1
7
6
Y3
A3
B3
C3
V
CC
C1
Y1
B2
A2
B1
A1
GND
Y2
C2
Inputs Output
A B C Y
L L L L
H X X H
X H X H
X X H H
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
1
14
1
14
ORDERING INFORMATION
MC74HCXXXXN
MC74HCXXXXD
Plastic
SOIC