SN54HC164, SN74HC164
8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS


SCLS115D – DECEMBER 1982 – REVISED AUGUST 2003
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 Wide Operating Voltage Range of 2 V to 6 V
C0068 Outputs Can Drive Up To 10 LSTTL Loads
C0068 Low Power Consumption, 80-µA Max I
CC
C0068 Typical t
pd
= 20 ns
C0068 ±4-mA Output Drive at 5 V
C0068 Low Input Current of 1 µA Max
C0068 AND-Gated (Enable/Disable) Serial Inputs
C0068 Fully Buffered Clock and Serial Inputs
C0068 Direct Clear
description/ordering information
These 8-bit shift registers feature AND-gated
serial inputs and an asynchronous clear (CLR)
input. The gated serial (A and B) inputs permit
complete control over incoming data; a low at
either input inhibits entry of the new data and
resets the first flip-flop to the low level at the next
clock (CLK) pulse. A high-level input enables the
other input, which then determines the state of the
first flip-flop. Data at the serial inputs can be
changed while CLK is high or low, provided the
minimum setup time requirements are met.
Clocking occurs on the low-to-high-level transition
of CLK.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
–40 C to 85 C
PDIP – N Tube of 25 SN74HC164N SN74HC164N
SOIC – D
Tube of 50 SN74HC164D
HC164Reel of 2500 SN74HC164DR
° °
Reel of 250 SN74HC164DT
SOP – NS Reel of 2000 SN74HC164NSR HC164
TSSOP – PW
Tube of 90 SN74HC164PW
HC164Reel of 2000 SN74HC164PWR
Reel of 250 SN74HC164PWT
–55 C to 125 C
CDIP – J Tube of 25 SNJ54HC164J SNJ54HC164J
° ° CFP – W Tube of 150 SNJ54HC164W SNJ54HC164W
LCCC – FK Tube of 55 SNJ54HC164FK SNJ54HC164FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54HC164 ...J OR W PACKAGE
SN74HC164 . . . D, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
A
B
Q
A
Q
B
Q
C
Q
D
GND
V
CC
Q
H
Q
G
Q
F
Q
E
CLR
CLK
3212019
910111213
4
5
6
7
8
18
17
16
15
14
Q
G
NC
Q
F
NC
Q
E
Q
A
NC
Q
B
NC
Q
C
B A NC
CLK CLR
V Q
D
GND
NC
SN54HC164 . . . FK PACKAGE
(TOP VIEW)
CC
H
Q
NC – No internal connection

Copyright  2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.