HD74HC155
Dual 2-to-4-line Decoders/Demultiplexers
Description
This circuit features dual 1-line-to-4-line demultiplexer with individual strobes and common binary-address
input. When both sections are enabled by the strobes, the common binary-address inputs sequentially
select and route associated input data to the appropriate output of each section. The individual strobes
permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input 1C is inverted
through its outputs. The inverter following the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-
line demultiplexer without external gating.
Features
• High Speed Operation: t
pd
(A or B to Y) = 15 ns typ (C
L
= 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V
CC
= 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I
CC
(static) = 4 µA max (Ta = 25°C)
Function Table
2-line-to-4-line Decoder/1-line-to-4-line Demultiplexer
Inputs
Select Strobe Data Outputs
B A 1G 1C 1Y
0
1Y
1
1Y
2
1Y
3
XX HX HHHH
LLLHLHH
LH L H H L H
HL HHL
HL HHHHL
XX XL H