C0077C0079C0084C0079C0082C0079C0076C0065
SEMICONDUCTOR TECHNICAL DATA
1 REV 6 Motorola, Inc. 1995
10/95
C0081C0117C0097C0100 C0050C0045C0073C0110C0112C0117C0116 C0068C0097C0116C0097
C0083C0101C0108C0101C0099C0116C0111C0114C0115C0047C0077C0117C0108C0116C0105C0112C0108C0101C0120C0101C0114C0115
High–Performance Silicon–Gate CMOS
The MC54/74HC157A is identical in pinout to the LS157. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This device routes 2 nibbles (A or B) to a single port (Y) as determined by
the Select input. The data is presented at the outputs in noninverted form. A
high level on the Output Enable input sets all four Y outputs to a low level.
The HC157A is similar in function to the HC257 which has 3–state outputs.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 82 FETs or 20.5 Equivalent Gates
LOGIC DIAGRAM
2
5
11
14
3
6
10
13
4
7
9
12
1
15
A0
A1
A2
A3
B0
B1
B2
B3
Y0
Y1
Y2
Y3
SELECT
OUTPUT
ENABLE
DATA
OUTPUTS
NIBBLE
A INPUTS
NIBBLE
B INPUTS
PIN 16 = V
CC
PIN 8 = GND
C0077C0067C0053C0052C0047C0055C0052C0072C0067C0049C0053C0055C0065
FUNCTION TABLE
PIN ASSIGNMENT
Inputs
Output Outputs
Enable Select Y0 – Y3
X = don’t care
A0 – A3, B0 – B3 = the levels
of the respective Data–Word
Inputs.
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
SELECT
Y0
B0
A0
Y1
B1
A1
GND
Y3
B3
A3
OUTPUT
ENABLE
V
CC
B2
A2
Y2
H
L
L
X
L
H
L
A0–A3
B0–B3
D SUFFIX
SOIC PACKAGE
CASE 751B–05
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT
Ceramic
Plastic
SOIC
TSSOP
1
16
1
16
1
16
DT SUFFIX
TSSOP PACKAGE
CASE 948F–01
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
1
16