74F825
器件描述：8-Bit D-Type Flip-Flop
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：52.45KB，共6页
Sponsor by e络盟器件资料摘要：
© 1999 Fairchild Semiconductor Corporation DS009597 www.fairchildsemi.com
April 1988
Revised August 1999
7
4F825 8-Bi
t D-T
ype Fli
p
-Fl
o
p
74F825
8-Bit D-Type Flip-Flop
General Description
The 74F825 is an 8-bit buffered register. It has Clock
Enable and Clear features which are ideal for parity bus
interfacing in high performance microprogramming sys-
tems. Also included in the 74F825 are multiple enables that
allow multi-user control of the interface.
Features
a73 3-STATE output
a73 Clock enable and clear
a73 Multiple output enables
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74F825SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F825SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
April 1988
Revised August 1999
7
4F825 8-Bi
t D-T
ype Fli
p
-Fl
o
p
74F825
8-Bit D-Type Flip-Flop
General Description
The 74F825 is an 8-bit buffered register. It has Clock
Enable and Clear features which are ideal for parity bus
interfacing in high performance microprogramming sys-
tems. Also included in the 74F825 are multiple enables that
allow multi-user control of the interface.
Features
a73 3-STATE output
a73 Clock enable and clear
a73 Multiple output enables
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74F825SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F825SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide