Philips Semiconductors Product specification
74F604Dual octal latch (3-State)
11990 Mar 01 853–0029 98991
FEATURES
• High impedance NPN base inputs for reduced loading
(20µA in High and Low states)
• Stores 16-bit–wide Data inputs, multiplexed 8-bit outputs
• 3-State outputs
• Power supply current 75mA typical
DESCRIPTION
The 74F604 multiplexed latch is ideal for storing data from two input
buses, A or B, and providing data from either the A or B latches to
the output bus. Organized as 8-bit A and B latches, the latch outputs
are connected by pairs to eight 2-input multiplexers. A Select
(SELECT A/B) input determines whether the A or B latch contents
are multiplexed to the eight 3-State outputs. Data entered from the B
inputs are selected when SELECT A/B is Low; data from the A
inputs are selected when SELECT A/B is High. Data enters the
latches when the Latch Enable (LE) input is Low and is latched on
the LE rising edge. The outputs are enabled when LE is High and
disabled when LE is Low.
PIN CONFIGURATION
28
27
26
25
24
23
227
6
5
4
3
2
1
A2
V
CC
B5
A6
B6
A5
A4
B4
LE
SELECT A/B
B1
A0
B0
A1
SF01115
218B2 A7
20
19
18
17
1613
12
11
10
9
Q1
Q6
Q5
Q4
Q7
B7
Q2
A3
B3
Q3
1514GND Q0
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL SUPPLY CURRENT
(TOTAL)
74F604 7.5ns 75mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V ±10%, T
amb
= 0°C to +70°C
28-pin plastic DIP N74F604N
28-pin plastic SOL N74F604D
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0–A7, B0–B7 Data inputs 1.0/0.033 20µA/20µA
SELECT A/B Select input 1.0/0.033 20µA/20µA
LE Latch Enable input (active Low) 1.0/0.033 20µA/20µA
Q0–Q7 Data outputs 150/40 3mA/24mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.