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74F413

器件描述:64 x 4 First-In First-Out Buffer Memory with Parallel I/O
器件厂商:FAIRCHILD [Fairchild Semiconductor]
文件大小:39.74KB,共5页
Sponsor by e络盟
器件资料摘要:
© 1999 Fairchild Semiconductor Corporation DS009541 www.fairchildsemi.com
April 1988
Revised August 1999
7
4F413 64
x 4 Fir
s
t-
In Fir
s
t-
Out Buff
er Mem
o
r
y

wi
th Paral
l
el
I/
O
74F413
64 x 4 First-In First-Out Buffer Memory with Parallel I/O
General Description
The F413 is an expandable fall-through type high-speed
First-In First-Out (FIFO) buffer memory organized as 64
words by four bits. The 4-bit input and output registers
record and transmit, respectively, asynchronous data in
parallel form. Control pins on the input and output allow for
handshaking and expansion. The 4-bit wide, 62-bit deep
fall-through stack has self-contained control logic.
Features
a73 Separate input and output clocks
a73 Parallel input and output
a73 Expandable without external logic
a73 15 MHz data rate
a73 Supply current 160 mA max
a73 Available in SOIC, (300 mil only)

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol Connection Diagram
Unit Loading/Fan Out
Order Number Package Number Package Description
74F413PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
U.L. Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
D
0
–D
3
Data Inputs 1.0/0.667 20 µA/−0.4 mA
O
0
–O
3
Data Outputs 50/13.3 −1 mA/8 mA
IR Input Ready 1.0/0.667 20 µA/−0.4 mA
SI Shift In 1.0/0.667 20 µA/−0.4 mA
SO Shift Out 1.0/0.667 20 µA/−0.4 mA
OR Output Ready 1.0/0.667 20 µA/−0.4 mA
MR
Master Reset 1.0/0.667 20 µA/−0.4 mA