© 1999 Fairchild Semiconductor Corporation DS009465 www.fairchildsemi.com
April 1988
Revised November 1999
7
4
F38
Quad T
w
o-I
nput NAND
Buf
f
er (
O
pen

Col
l
ect
or)
74F38
Quad Two-Input NAND Buffer (Open Collector)
General Description
This device contains four independent gates, each of which
performs the logic NAND function. The open-collector out-
puts require external pull-up resistors for proper logical
operation.

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
Note 1: OC = Open Collector
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
Order Number Package Number Package Description
74F38SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F38SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F38PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
U.L. Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
A
n
, B
n
Inputs 1.0/2.0 20 µA/−1.2 mA
O
n
Outputs OC (Note 1) /106.6 OC (Note 1) /64 mA
Inputs Output
AB O
LL H
LH H
HL H
HH L