© 1999 Fairchild Semiconductor Corporation DS009480 www.fairchildsemi.com
April 1988
Revised July 1999
7
4F148
8-Li
ne t
o

3-Li
ne Pr
ior
i
t
y
Enc
oder
74F148
8-Line to 3-Line Priority Encoder
General Description
The F148 provides three bits of binary coded output repre-
senting the position of the highest order active input, along
with an output indicating the presence of any active input. It
is easily expanded via input and output enables to provide
priority encoding over many bits.
Features
a73 Encodes eight data lines in priority
a73 Provides 3-bit binary priority code
a73 Input enable capability
a73 Signals when data is present on any input
a73 Cascadable for priority encoding of n bits

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Order Number Package Number Package Description
74F148SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F148SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F148PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Outputs
EI I
0
I
1
I
2
I
3
I
4
I
5
I
6
I
7
GS A
0
A
1
A
2
EO
HXXXXXXXXHHHHH
LHHHHHHHH HHHH L
LXXXXXXXL L LLL H
LXXXXXXLH L HLL H
LXXXXXLHH L LHL H
LXXXXLHHH L HHL H
LXXXLHHHHL LLHH
LXXLHHHHH L HLH H
LXLHHHHHH L LHH H
L LHHHHHHH L HHH H