© 1999 Fairchild Semiconductor Corporation DS009477 www.fairchildsemi.com
April 1988
Revised July 1999
7
4F132 Q
uad 2-
Input

NAND S
c
hm
i
t
t

T
r
igg
e
r
74F132
Quad 2-Input NAND Schmitt Trigger
General Description
The F132 contains four 2-input NAND gates which accept
standard TTL input signals and provide standard TTL out-
put levels. They are capable of transforming slowly chang-
ing input signals into sharply defined, jitter-free output
signals. In addition, they have a greater noise margin than
conventional NAND gates.
Each circuit contains a 2-input Schmitt Trigger followed by
level shifting circuitry and a standard FAST output struc-
ture. The Schmitt Trigger uses positive feedback to effec-
tively speed-up slow input transitions, and provide different
input threshold voltages for positive and negative-going
transitions. This hysteresis between the positive-going and
negative-going input threshold (typically 800 mV) is deter-
mined by resistor ratios and is essentially insensitive to
temperature and supply voltage variations.

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Unit Loading/Fan Out
Connection Diagram
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
FAST is a registered trademark of Fairchild Semiconductor Corporation
Order Number Package Number Package Description
74F132SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F132SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F132PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
U.L. Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
A
n
, B
n
Inputs 1.0/1.0 20 µA/−0.6 mA
O
n
Outputs 50/33.3 −1 mA/20 mA
Inputs Outputs
AB O
LL H
LH
HL H
HH L