© 2001 Fairchild Semiconductor Corporation ds500695 www.fairchildsemi.com
November 2001
Revised November 2001
7
4
AL
VC1632
45
Low V
o
l
t
a
ge
16
-Bit
D
u
al Supply T
r
a
n
slat
ing

T
r
anscei
ver w
i
t
h

3-
ST
A
T
E O
u
tput
s
74ALVC163245
Low Voltage 16-Bit Dual Supply Translating Transceiver
with 3-STATE Outputs
General Description
The ALVC163245 is a dual supply, 16-bit translating trans-
ceiver that is designed for 2 way asynchronous communi-
cation between busses at different supply voltages by
providing true signal translation. The supply rails consist of
V
CCA
, which is a higher potential rail operating at 2.3V to
3.6V and V
CCB
, which is the lower potential rail operating at
1.65V to 2.7V. (V
CCB
must be less than or equal to V
CCA
for proper device operation). This dual supply design
allows for translation from 1.8V to 2.5V busses to busses at
a higher potential, up to 3.3V.
The Transmit/Receive (T/R) input determines the direction
of data flow. Transmit (active-HIGH) enables data from
A Ports to B Ports; Receive (active-LOW) enables data
from B Ports to A Ports. The Output Enable (OE) input,
when HIGH, disables both A and B Ports by placing them
in a High-Z condition. The A Port interfaces with the higher
voltage bus (2.7V to 3.3V); The B Port interfaces with the
lower voltage bus (1.8V to 2.5V). Also the ALVC163245 is
designed so that the control pins (T/R
n
, OE
n
) are supplied
by V
CCB
.
The 74ALVC163245 is suitable for mixed voltage applica-
tions such as notebook computers using a 1.8V CPU and
3.3V peripheral components. It is fabricated with an
Advanced CMOS technology to achieve high speed opera-
tion while maintaining low CMOS power dissipation.
Features
a73 Bidirectional interface between busses ranging from
1.65V to 3.6V
a73 Supports Live Insertion and Withdrawal (Note 1)
a73 Uses patented Quiet Series noise/EMI reduction
circuitry
a73 Functionally compatible with 74 series 16245
a73 Latchup conforms to JEDEC JED78
a73 ESD performance:
Human Body Model >2000V
Machine model >200V
a73 Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Note 1: To ensure the high impedance state during power up or power
down, OE
n
should be tied to V
CCB
through a pull up resistor. The minimum
value of the resistor is determined by the current sourcing capability of the
driver.

Ordering Code:
Note 2: BGA package available in Tape and Reel only.
Note 3: Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ALVC163245GX
(Note 2)
BGA54A
(Preliminary)
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[Tape and Reel]
74ALVC163245T
(Note 3)
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide