74ACTQ18825
器件描述：18-Bit Buffer/Line Driver with 3-STATE Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：78.69KB，共7页
Sponsor by e络盟器件资料摘要：
© 2000 Fairchild Semiconductor Corporation DS010955 www.fairchildsemi.com
September 1991
Revised January 2000
7
4
AC
TQ188
25
18-
Bit
Buf
f
e
r
/L
ine Dri
ver w
i
t
h
3-
ST
A
T
E Output
s
74ACTQ18825
18-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ACTQ18825 contains eighteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is byte controlled. Each byte
has separate 3-STATE control inputs which can be shorted
together for full 18-bit operation.
The ACTQ18825 utilizes Fairchild FACT Quiet Series
technology to guarantee quiet output switching and
improved dynamic threshold performance. FACT Quiet
Series features GTO output control and undershoot cor-
rector for superior performance.
Features
a73 Utilizes Fairchild FACT Quiet Series technology
a73 Broadside pinout allows for easy board layout
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance
a73 Guaranteed pin-to-pin output skew
a73 Separate control logic for each byte
a73 Extra data width for wider address/data paths or buses
carrying parity
a73 Outputs source/sink 24 mA
a73 Additional specs for Multiple Output Switching
a73 Output loading specs for both 50 pF and 250 pF loads
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
FACT, FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACTQ18825SSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACTQ18825MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
I
0
–I
17
Inputs
O
0
–O
17
Outputs
September 1991
Revised January 2000
7
4
AC
TQ188
25
18-
Bit
Buf
f
e
r
/L
ine Dri
ver w
i
t
h
3-
ST
A
T
E Output
s
74ACTQ18825
18-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ACTQ18825 contains eighteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is byte controlled. Each byte
has separate 3-STATE control inputs which can be shorted
together for full 18-bit operation.
The ACTQ18825 utilizes Fairchild FACT Quiet Series
technology to guarantee quiet output switching and
improved dynamic threshold performance. FACT Quiet
Series features GTO output control and undershoot cor-
rector for superior performance.
Features
a73 Utilizes Fairchild FACT Quiet Series technology
a73 Broadside pinout allows for easy board layout
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance
a73 Guaranteed pin-to-pin output skew
a73 Separate control logic for each byte
a73 Extra data width for wider address/data paths or buses
carrying parity
a73 Outputs source/sink 24 mA
a73 Additional specs for Multiple Output Switching
a73 Output loading specs for both 50 pF and 250 pF loads
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
FACT, FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACTQ18825SSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACTQ18825MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
I
0
–I
17
Inputs
O
0
–O
17
Outputs