74ACTQ16543
器件描述：16-Bit Registered Transceiver with 3-STATE Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：76.14KB，共9页
Sponsor by e络盟器件资料摘要：
December 1991
Revised December 1998
7
4
A
C
TQ16543 16-
Bit
Regi
ster
ed T
r
ans
ceiver
wi
th 3-ST
A
T
E
Out
puts
© 1999 Fairchild Semiconductor Corporation DS010967.prf www.fairchildsemi.com
74ACTQ16543
16-Bit Registered Transceiver with 3-STATE Outputs
General Description
The ACTQ16543 contains sixteen non-inverting transceiv-
ers containing two sets of D-type registers for temporary
storage of data flowing in either direction. Each byte has
separate control inputs which can be shorted together for
full 16-bit operation. Separate Latch Enable and Output
Enable inputs are provided for each register to permit inde-
pendent input and output control in either direction of data
flow.
The ACTQ16543 utilizes Fairchild Quiet Series technol-
ogy to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Series fea-
tures GTO output control and undershoot corrector for
superior performance.
Features
a73 Utilizes Fairchild FACT Quiet Series technology
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance
a73 Guaranteed pin-to-pin output skew
a73 Independent registers for A and B buses
a73 Separate controls for data flow in each direction
a73 Back-to-back registers for storage
Multiplexed real-time and stored data transfers
a73 Separate control logic for each byte
a73 16-bit version of the ACTQ543
a73 Outputs source/sink 24 mA
a73 Additional specs for Multiple Output Switching
a73 Output loading specs for both 50 pF and 250pF loads
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Pin Descriptions
FACT, Quiet Series, FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACTQ16543SSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACTQ16543MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Descriptions
OEAB
n
A-to-B Output Enable Input (Active LOW)
OEBA
n
B-to-A Output Enable Input (Active LOW)
CEAB
n
A-to-B Enable Input (Active LOW)
CEBA
n
B-to-A Enable Input (Active LOW)
LEAB
n
A-to-B Latch Enable Input (Active LOW)
LEBA
n
B-to-A Latch Enable Input (Active LOW)
A
0
–A
15
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B
0
–B
15
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
Revised December 1998
7
4
A
C
TQ16543 16-
Bit
Regi
ster
ed T
r
ans
ceiver
wi
th 3-ST
A
T
E
Out
puts
© 1999 Fairchild Semiconductor Corporation DS010967.prf www.fairchildsemi.com
74ACTQ16543
16-Bit Registered Transceiver with 3-STATE Outputs
General Description
The ACTQ16543 contains sixteen non-inverting transceiv-
ers containing two sets of D-type registers for temporary
storage of data flowing in either direction. Each byte has
separate control inputs which can be shorted together for
full 16-bit operation. Separate Latch Enable and Output
Enable inputs are provided for each register to permit inde-
pendent input and output control in either direction of data
flow.
The ACTQ16543 utilizes Fairchild Quiet Series technol-
ogy to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Series fea-
tures GTO output control and undershoot corrector for
superior performance.
Features
a73 Utilizes Fairchild FACT Quiet Series technology
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance
a73 Guaranteed pin-to-pin output skew
a73 Independent registers for A and B buses
a73 Separate controls for data flow in each direction
a73 Back-to-back registers for storage
Multiplexed real-time and stored data transfers
a73 Separate control logic for each byte
a73 16-bit version of the ACTQ543
a73 Outputs source/sink 24 mA
a73 Additional specs for Multiple Output Switching
a73 Output loading specs for both 50 pF and 250pF loads
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Pin Descriptions
FACT, Quiet Series, FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACTQ16543SSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACTQ16543MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Descriptions
OEAB
n
A-to-B Output Enable Input (Active LOW)
OEBA
n
B-to-A Output Enable Input (Active LOW)
CEAB
n
A-to-B Enable Input (Active LOW)
CEBA
n
B-to-A Enable Input (Active LOW)
LEAB
n
A-to-B Latch Enable Input (Active LOW)
LEBA
n
B-to-A Latch Enable Input (Active LOW)
A
0
–A
15
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B
0
–B
15
B-to-A Data Inputs or
A-to-B 3-STATE Outputs