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74ACT18823MTD

器件描述:18-Bit D-Type Flip-Flop with 3-STATE Outputs
器件厂商:FAIRCHILD [Fairchild Semiconductor]
文件大小:60.51KB,共6页
Sponsor by e络盟
器件资料摘要:
© 1999 Fairchild Semiconductor Corporation DS500294 www.fairchildsemi.com
August 1999
Revised October 1999
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74ACT18823
18-Bit D-Type Flip-Flop with 3-STATE Outputs
General Description
The ACT18823 contains eighteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP), Clear (CLR), Clock Enable (EN) and Output Enable
(OE) are common to each byte and can be shorted
together for full 18-bit operation.
Features
a73 Broadside pinout allows for easy board layout
a73 Separate control logic for each byte
a73 Extra data width for wider address/data paths or buses
carrying parity
a73 Outputs source/sink 24 mA
a73 TTL-compatible inputs

Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
FACT is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACT18823SSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACT18823MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
CLR
n
Clear (Active LOW)
EN
n
Clock Enable (Active LOW)
CP
n
Clock Pulse Input
I
0
–I
17
Inputs
O
0
–O
17
Outputs