74ACQ657SPC
器件描述：Quiet Series⑩ Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and 3-STATE Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：96.27KB，共10页
Sponsor by e络盟器件资料摘要：
© 2000 Fairchild Semiconductor Corporation DS010636 www.fairchildsemi.com
January 1990
Revised September 2000
7
4
AC
Q657 • 74AC
T
Q
6
5
7
Qui
e
t Seri
es
Oct
a
l Bidi
re
cti
onal T
r
a
n
sceiv
e
r w
i
th 8-
B
i
t
Par
i
t
y
Gener
a
tor
/
Checke
r
a
nd
3
-
ST
A
T
E
Output
s
74ACQ657 74ACTQ657
Quiet Series Octal Bidirectional Transceiver with
8-Bit Parity Generator/Checker and 3-STATE Outputs
General Description
The ACQ/ACTQ657 contains eight non-inverting buffers
with 3-STATE outputs and an 8-bit parity generator/
checker. Intended for bus oriented applications, the device
combines the 245 and the 280 functions in one package.
The ACQ/ACTQ utilizes Fairchild Quiet Series technol-
ogy to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Series fea-
tures GTO output control and undershoot corrector in
addition to a split ground bus or superior performance.
Features
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance
a73 Guaranteed pin-to-pin skew AC performance
a73 Combines the 245 and the 280 functions in one package
a73 300 mil 24-pin slim dual-in-line package
a73 Outputs source/sink 24 mA
a73 ACTQ has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT, Quiet Series, FACT Quiet Series, and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACQ657SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACTQ657SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ657SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A
0
–A
7
Data Inputs/3-STATE Outputs
B
0
–B
7
Data Inputs/3-STATE Outputs
T/R Transmit/Receive Input
OE Enable Input
PARITY Parity Input/3-STATE Output
ODD/EVEN ODD/EVEN Parity Input
ERROR Error 3-STATE Output
January 1990
Revised September 2000
7
4
AC
Q657 • 74AC
T
Q
6
5
7
Qui
e
t Seri
es
Oct
a
l Bidi
re
cti
onal T
r
a
n
sceiv
e
r w
i
th 8-
B
i
t
Par
i
t
y
Gener
a
tor
/
Checke
r
a
nd
3
-
ST
A
T
E
Output
s
74ACQ657 74ACTQ657
Quiet Series Octal Bidirectional Transceiver with
8-Bit Parity Generator/Checker and 3-STATE Outputs
General Description
The ACQ/ACTQ657 contains eight non-inverting buffers
with 3-STATE outputs and an 8-bit parity generator/
checker. Intended for bus oriented applications, the device
combines the 245 and the 280 functions in one package.
The ACQ/ACTQ utilizes Fairchild Quiet Series technol-
ogy to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Series fea-
tures GTO output control and undershoot corrector in
addition to a split ground bus or superior performance.
Features
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance
a73 Guaranteed pin-to-pin skew AC performance
a73 Combines the 245 and the 280 functions in one package
a73 300 mil 24-pin slim dual-in-line package
a73 Outputs source/sink 24 mA
a73 ACTQ has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT, Quiet Series, FACT Quiet Series, and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACQ657SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACTQ657SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ657SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A
0
–A
7
Data Inputs/3-STATE Outputs
B
0
–B
7
Data Inputs/3-STATE Outputs
T/R Transmit/Receive Input
OE Enable Input
PARITY Parity Input/3-STATE Output
ODD/EVEN ODD/EVEN Parity Input
ERROR Error 3-STATE Output