1/13April 2001
a73 HIGH SPEED:
a73 f
MAX
= 240MHz (TYP.) at V
CC
= 5V
a73 LOW POWER DISSIPATION:
I
CC
= 8µA(MAX.) at T
A
=25°C
a73 HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
a73 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL

a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
a73 PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 299
a73 IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC299 is an advanced high-speed CMOS
8-BIT PIPO SHIFT REGISTER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
These devices have four modes (HOLD, SHIFT
LEFT, SHIFT RIGHT and LOAD DATA). Each
mode is chosen by two function select inputs (S0,
S1) as shown in the Truth Table. When one or
both enable inputs, (G1, G2) are high, the eight
input/output terminals are in the high-impedance
state; however sequential operation or clearing of
the register is not affected. Clear function is
asynchronous to clock.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74AC299
8 BIT PIPO SHIFT REGISTER
WITH ASYNCHRONOUS CLEAR

PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
DIP 74AC299B
SOP 74AC299M 74AC299MTR
TSSOP 74AC299TTR
TSSOPDIP SOP