© 1999 Fairchild Semiconductor Corporation DS009955 www.fairchildsemi.com
November 1988
Revised November 1999
7
4
AC
2
80 9-
Bit
Par
i
t
y
Gener
a
to
r/Che
cker
74AC280
9-Bit Parity Generator/Checker
General Description
The AC280 is a high-speed parity generator/checker that
accepts nine bits of input data and detects whether an
even or an odd number of these inputs is HIGH. If an even
number of inputs is HIGH, the Sum Even output is HIGH. If
an odd number is HIGH, the Sum Even output is LOW. The
Sum Odd output is the complement of the Sum Even out-
put.
Features
a73 I
CC
reduced by 50%
a73 9-bit width for memory applications
a73 AC280: 5962-92201

Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Pin Descriptions
Connection Diagram
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
FACT is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74AC280SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
74AC280SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Pin Names Description
I
0
–I
8
Data Inputs
∑
Ο
Odd Parity Output
∑
Ε
Even Parity Output
Number of Outputs
HIGH Inputs
∑ Even ∑ Odd
I
0
–I
8
0, 2, 4, 6, 8 H L
1, 3, 5, 7, 9 L H