74AC273
器件描述：Octal D-Type Flip-Flop
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：98.94KB，共10页
Sponsor by e络盟器件资料摘要：
© 2000 Fairchild Semiconductor Corporation DS009954 www.fairchildsemi.com
November 1988
Revised August 2000
7
4
AC
2
73 •
74ACT273
O
c
t
a
l
D-
T
y
pe Fl
ip-
F
l
o
p
74AC273 74ACT273
Octal D-Type Flip-Flop
General Description
The AC273 and ACT273 have eight edge-triggered D-type
flip-flops with individual D-type inputs and Q outputs. The
common buffered Clock (CP) and Master Reset (MR) input
load and reset (clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D-
type input, one setup time before the LOW-to-HIGH clock
transition, is transferred to the corresponding flip-flop’s Q
output.
All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR input. The
device is useful for applications where the true output only
is required and the Clock and Master Reset are common to
all storage elements.
Features
a73 Ideal buffer for microprocessor or memory
a73 Eight edge-triggered D-type flip-flops
a73 Buffered common clock
a73 Buffered, asynchronous master reset
a73 See 377 for clock enable version
a73 See 373 for transparent latch version
a73 See 374 for 3-STATE version
a73 Outputs source/sink 24 mA
a73 74ACT273 has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
FACT is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74AC273SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74AC273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC273MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACT273SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACT273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT273MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
November 1988
Revised August 2000
7
4
AC
2
73 •
74ACT273
O
c
t
a
l
D-
T
y
pe Fl
ip-
F
l
o
p
74AC273 74ACT273
Octal D-Type Flip-Flop
General Description
The AC273 and ACT273 have eight edge-triggered D-type
flip-flops with individual D-type inputs and Q outputs. The
common buffered Clock (CP) and Master Reset (MR) input
load and reset (clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D-
type input, one setup time before the LOW-to-HIGH clock
transition, is transferred to the corresponding flip-flop’s Q
output.
All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR input. The
device is useful for applications where the true output only
is required and the Clock and Master Reset are common to
all storage elements.
Features
a73 Ideal buffer for microprocessor or memory
a73 Eight edge-triggered D-type flip-flops
a73 Buffered common clock
a73 Buffered, asynchronous master reset
a73 See 377 for clock enable version
a73 See 373 for transparent latch version
a73 See 374 for 3-STATE version
a73 Outputs source/sink 24 mA
a73 74ACT273 has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
FACT is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74AC273SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74AC273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC273MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACT273SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACT273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT273MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide