© 1999 Fairchild Semiconductor Corporation DS009940 www.fairchildsemi.com
November 1988
Revised November 1999
7
4
AC
1
91 Up/
D
ow
n
Count
er
w
i
t
h
Pre
set
and
R
i
ppl
e Cl
ock
74AC191
Up/Down Counter with Preset and Ripple Clock
General Description
The AC191 is a reversible modulo 16 binary counter. It fea-
tures synchronous counting and asynchronous presetting.
The preset feature allows the AC191 to be used in pro-
grammable dividers. The Count Enable input, the Terminal
Count output and the Ripple Clock output make possible a
variety of methods of implementing multistage counters. In
the counting modes, state changes are initiated by the ris-
ing edge of the clock.
Features
a73 I
CC
reduced by 50%
a73 High speed—133 MHz typical count frequency
a73 Synchronous counting
a73 Asynchronous parallel load
a73 Cascadable
a73 Outputs source/sink 24 mA

Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74AC191SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
74AC191SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC191MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC191PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Pin Names Description
CE
Count Enable Input
CP Clock Pulse Input
P
0
–P
3
Parallel Data Inputs
PL
Asynchronous Parallel Load Input
U /D
Up/Down Count Control Input
Q
0
–Q
3
Flip-Flop Outputs
RC
Ripple Clock Output
TC Terminal Count Output