74ABT646
器件描述：Octal Transceivers and Registers with 3-STATE Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：97.91KB，共9页
Sponsor by e络盟器件资料摘要：
© 1999 Fairchild Semiconductor Corporation DS010978 www.fairchildsemi.com
April 1992
Revised November 1999
7
4
AB
T6
46
Oct
a
l T
r
an
sceive
rs and
Regi
st
ers w
i
th
3-
ST
A
T
E O
u
t
put
s
74ABT646
Octal Transceivers and Registers with 3-STATE Outputs
General Description
The ABT646 consists of bus transceiver circuits with 3-
STATE, D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the input bus
or from the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes
to a high logic level. Control OE and direction pins are pro-
vided to control the transceiver function. In the transceiver
mode, data present at the high impedance port may be
stored in either the A or the B register or in both. The select
controls can multiplex stored and real-time (transparent
mode) data. The direction control determines which bus
will receive data when the enable control OE is Active
LOW. In the isolation mode (control OE HIGH), A data may
be stored in the B register and/or B data may be stored in
the A register.
Features
a73 Independent registers for A and B buses
a73 Multiplexed real-time and stored data
a73 A and B output sink capability of 64 mA, source capabil-
ity of 32 mA
a73 Guaranteed output skew
a73 Guaranteed multiple output switching specifications
a73 Output switching specified for both 50 pF and 250 pF
loads
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance
a73 Guaranteed latchup protection
a73 High impedance glitch free bus loading during entire
power up and power down cycle
a73 Nondestructive hot insertion capability
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram Pin Descriptions
Order Number Package Number Package Description
74ABT646CSC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-153, 4.4mm Wide
74ABT646CMSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74ABT646CMTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
A
0
–A
7
Data Register A Inputs/3-STATE Outputs
B
0
–B
7
Data Register B Inputs/3-STATE Outputs
CPAB, CPBA Clock Pulse Inputs
SAB, SBA Select Inputs
OE Output Enable Input
DIR Direction Control Input
April 1992
Revised November 1999
7
4
AB
T6
46
Oct
a
l T
r
an
sceive
rs and
Regi
st
ers w
i
th
3-
ST
A
T
E O
u
t
put
s
74ABT646
Octal Transceivers and Registers with 3-STATE Outputs
General Description
The ABT646 consists of bus transceiver circuits with 3-
STATE, D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the input bus
or from the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes
to a high logic level. Control OE and direction pins are pro-
vided to control the transceiver function. In the transceiver
mode, data present at the high impedance port may be
stored in either the A or the B register or in both. The select
controls can multiplex stored and real-time (transparent
mode) data. The direction control determines which bus
will receive data when the enable control OE is Active
LOW. In the isolation mode (control OE HIGH), A data may
be stored in the B register and/or B data may be stored in
the A register.
Features
a73 Independent registers for A and B buses
a73 Multiplexed real-time and stored data
a73 A and B output sink capability of 64 mA, source capabil-
ity of 32 mA
a73 Guaranteed output skew
a73 Guaranteed multiple output switching specifications
a73 Output switching specified for both 50 pF and 250 pF
loads
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance
a73 Guaranteed latchup protection
a73 High impedance glitch free bus loading during entire
power up and power down cycle
a73 Nondestructive hot insertion capability
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram Pin Descriptions
Order Number Package Number Package Description
74ABT646CSC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-153, 4.4mm Wide
74ABT646CMSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74ABT646CMTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
A
0
–A
7
Data Register A Inputs/3-STATE Outputs
B
0
–B
7
Data Register B Inputs/3-STATE Outputs
CPAB, CPBA Clock Pulse Inputs
SAB, SBA Select Inputs
OE Output Enable Input
DIR Direction Control Input