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74ABT2952

器件描述:Octal Registered Transceiver
器件厂商:FAIRCHILD [Fairchild Semiconductor]
文件大小:93.74KB,共8页
Sponsor by e络盟
器件资料摘要:
© 1999 Fairchild Semiconductor Corporation DS010969 www.fairchildsemi.com
January 1992
Revised November 1999
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74ABT2952
Octal Registered Transceiver
General Description
The ABT2952 is an octal registered transceiver. Two 8-bit
back to back registers store data flowing in both directions
between two bidirectional buses. Separate clock, clock
enable and 3-STATE output enable signals are provided for
each register. The output pins are guaranteed to source 32
mA and to sink 64 mA.
Features
a73 Separate clock, clock enable and 3-STATE output
enable provided for each register
a73 A and B output sink capability of 64 mA source capability
of 32 mA
a73 Guaranteed output skew
a73 Guaranteed multiple output switching specifications
a73 Output switching specified for both 50 pF and 250 pF
loads
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance
a73 Guaranteed latchup protection
a73 High impedance glitch free bus loading during entire
power up and power down cycle
a73 Nondestructive hot insertion capability

Ordering Code:
Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Pin Descriptions
Order Number Package Number Package Description
74ABT2952CSC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
74ABT2952CMSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74ABT2952CMTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
A
0
–A
7
A-Register Inputs/B-Register
3-STATE Outputs
B
0
–B
7
B-Register Inputs/A-Register
3-STATE Outputs
OEA Output Enable A-Register
CPA A-Register Clock
CEA A-Register Clock Enable
OEB Output Enable B-Register
CPB B-Register Clock
CEB B-Register Clock Enable