© 2005 Fairchild Semiconductor Corporation DS011666 www.fairchildsemi.com
March 1994
Revised May 2005
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74ABT16373
16-Bit Transparent D-Type Latch with 3-STATE Outputs
General Description
The ABT16373 contains sixteen non-inverting latches with
3-STATE outputs and is intended for bus oriented applica-
tions. The device is byte controlled. The flip-flops appear
transparent to the data when the Latch Enable (LE) is
HIGH. When LE is LOW, the data that meets the setup time
is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
high Z state.
Features
a73 Separate control logic for each byte
a73 16-bit version of the ABT373
a73 High impedance glitch free bus loading during entire
power up and power down cycle
a73 Non-destructive hot insertion capability
a73 Guaranteed latch-up protection

Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
Order Number Package Number Package Description
74ABT16373CSSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74ABT16373CMTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
LE
n
Latch Enable Input
D
0
–D
15
Data Inputs
O
0
–O
15
Outputs