© 2000 Fairchild Semiconductor Corporation DS006361 www.fairchildsemi.com
June 1986
Revised March 2000
DM74LS32 Quad 2-I
nput OR
Gate
DM74LS32
Quad 2-Input OR Gate
General Description
This device contains four independent gates each of which
performs the logic OR function.

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Function Table
Y = A + B
H = HIGH Logic Level
L = LOW Logic Level
Order Number Package Number Package Description
DM74LS32M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS32SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS32N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Output
ABY
LLL
LHH
HL
HHH