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厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

5962-9155501M3A

器件描述:OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
器件厂商:TI [Texas Instruments]
厂商主页:http://www.ti.com/
文件大小:337.62KB,共15页
Sponsor by e络盟
器件资料摘要:
C0083C0078C0053C0052C0066C0067C0084C0054C0052C0054C0044 C0083C0078C0055C0052C0066C0067C0084C0054C0052C0054
C0079C0067C0084C0065C0076 C0066C0085C0083 C0084C0082C0065C0078C0083C0067C0069C0073C0086C0069C0082C0083 C0065C0078C0068 C0082C0069C0071C0073C0083C0084C0069C0082C0083
C0087C0073C0084C0072 C0051C0262C0083C0084C0065C0084C0069 C0079C0085C0084C0080C0085C0084C0083
SCBS037D − AUGUST 1989 − REVISED MAY 2004
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
C0068 Bus Transceivers/Registers
C0068 Independent Registers and Enables for
A and B Buses
C0068 Multiplexed Real-Time and Stored Data
C0068 ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SN54BCT646 ...JT OR W PACKAGE
SN74BCT646 . . . DW OR NT PACKAGE
(TOP VIEW)
5
6
7
8
9
10
11
25
24
23
22
21
20
19
432128
12 13 14 15 16
OE
B1
B2
NC
B3
B4
B5
A1
A2
A3
NC
A4
A5
A6
SN54BCT646...FK PACKAGE
(TOP VIEW)
DIR SAB CLKAB
B8 B7A8
GND
NC
NC CLKBA SBAV
A7 B6
17 18
27 26
CC
NC − No internal connection
description/ordering information
These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked
into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1
illustrates the four fundamental bus-management functions that can be performed with the ’BCT646 devices.
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the
transceiver mode, data present at the high-impedance port can be stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The
direction control (DIR) determines which bus will receive data when OE is low. In the isolation mode (OE high),
A data can be stored in one register and/or B data can be stored in the other register.
ORDERING INFORMATION
T
A
PACKAGE

ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − NT Tube SN74BCT646NT SN74BCT646NT
0°C to 70°C
SOIC − DW
Tube SN74BCT646DW
BCT646
Tape and reel SN74BCT646DWR
CDIP − JT Tube SNJ54BCT646JT SNJ54BCT646JT
−55°C to 125°C CFP − W Tube SNJ54BCT646W SNJ54BCT646W
LCCC − FK Tube SNJ54BCT646FK SNJ54BCT646FK

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright  2004, Texas Instruments IncorporatedC0080C0082C0079C0068C0085C0067C0084C0073C0079C0078 C0068C0065C0084C0065 C0105C0110C0102C0111C0114C0109C0097C0116C0105C0111C0110 C0105C0115 C0099C0117C0114C0114C0101C0110C0116 C0097C0115 C0111C0102 C0112C0117C0098C0108C0105C0099C0097C0116C0105C0111C0110 C0100C0097C0116C0101C0046
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C0115C0116C0097C0110C0100C0097C0114C0100 C0119C0097C0114C0114C0097C0110C0116C0121C0046 C0080C0114C0111C0100C0117C0099C0116C0105C0111C0110 C0112C0114C0111C0099C0101C0115C0115C0105C0110C0103 C0100C0111C0101C0115 C0110C0111C0116 C0110C0101C0099C0101C0115C0115C0097C0114C0105C0108C0121 C0105C0110C0099C0108C0117C0100C0101
C0116C0101C0115C0116C0105C0110C0103 C0111C0102 C0097C0108C0108 C0112C0097C0114C0097C0109C0101C0116C0101C0114C0115C0046
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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