1
Memory
All data sheets are subject to change without notice
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
P
RELIMINARY
3.3V ABT16-Bit Transparent
D-Type Latches
54LVTH16373
©2001 Maxwell Technologies
All rights reserved.
12.19.01 Rev 11000603
FEATURES:
• 3.3V low voltage advanced BiCMOS technology (LVT) 16-
bit transparent D-type latches with 3-state outputs
• Total dose hardness:
- > 100 krad (Si), dependent upon space mission
• Single event effect:
- SEL
TH
: No LU > 119 MeV/mg/cm
2
• Package: 48 pin RAD-PAK® flat package
• Operating temperature range:
- 55 to 125°C
• Distributed V
CC
and GND pin configuration minimizes high-
speed switching noise
• Supports mixed-mode signal operation
- 5V input and output voltages with 3.3V V
CC
• Supports unregulated battery operation down to 2.7V
•Typical V
OLP
(output ground bounce) < 0.8V at V
CC
=3.3V,
T
A
=25°C
• Latch-up performance exceeds 500mA per JEDEC stan-
dard
• Supports live insertion
• Bus-hold data inputs eliminate the need for external pullup
resistors
DESCRIPTION:
Maxwell Technologies’ 54LVTH16373 16-bit transparent D-
type latches with 3-state output features a greater than 100
krad (Si) total dose tolerance, dependent upon space mission.
The 54LVTH16373 is designed for low voltage (3.3V) V
CC
operation, but with the capability to provide a TTL interface to
a 5V system environment. It is suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and working reg-
isters. The 54LVTH16373 can be used as two 8-bit latches or
one 16-bit latch. When the latch-enable (LE) input is low, the
Q output are latched at the levels set up at the data (D) inputs.
When LE is high, the Q outputs follow the D inputs. A buffered
output-enable (OE) input can be used to place the eight out-
puts in either a normal logic state or a high impedance state.
In the high impedance state, the outputs neither load nor drive
the bus lines significantly. The high impedance state and the
increased drive provide the capability to drive bus lines with-
out the need for interface or pullup components. OE does not
affect internal operations of the latch. Old data can be retained
or new data can be entered while the outputs are in the high
impedance state.
Maxwell Technologies' patented RAD-PAK® packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, RAD-PAK provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
148
24 25
1LE
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2LE2OE
2Q8
2Q7
GND
2Q6
2Q5
VCC
2Q4
2Q3
GND
2Q2
2Q1
1Q8
1Q7
GND
1Q6
1Q5
VCC
1Q4
1Q3
GND
1Q2
1Q1
1OE
1OE/2OE
1LE/2LE
1D1/2D1
C1
1D
1/24
48/25
47/36
2/13
1Q1/2Q1
To Seven Other Channels
Logic Diagram (PositiveLogic)
54LVTH16373
Logic Diagram