TL/F/6430
54LS368A/DM54LS368A/DM74LS368A
Hex
TRI-STATE
Inverting
Buffers
May 1989
54LS368A/DM54LS368A/DM74LS368A
Hex TRI-STATE Inverting Buffers
General Description
This device contains six independent gates each of which
performs an inverting buffer function. The outputs have the
TRI-STATE feature. When enabled, the outputs exhibit the
low impedance characteristics of a standard LS output with
additional drive capability to permit the driving of bus lines
without external resistors. When disabled, both the output
transistors are turned off presenting a high-impedance state
to the bus line. Thus the output will act neither as a signifi-
cant load nor as a driver. To minimize the possibility that two
outputs will attempt to take a common bus to opposite logic
levels, the disable time is shorter than the enable time of the
outputs.
Features
Y
Alternate Military/Aerospace device (54LS368) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6430–1
Order Number 54LS368ADMQB, 54LS368AFMQB, 54LS368ALMQB,
DM54LS368AJ, DM54LS368AW, DM74LS368AM or DM74LS368AN
See NS Package Number E20A, J16A, M16A, N16E or W16A
Function Table
Y e A
Inputs Output
AG Y
LL H
HL L
X H Hi-Z
H e High Logic Level
L e Low Logic Level
X e Either Low or High Logic Level
Hi-Z e TRI-STATE (Outputs are disabled)
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.