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54LS279

器件描述:Quad S-R Latches
器件厂商:NSC [National Semiconductor]
文件大小:137.77KB,共6页
Sponsor by e络盟
器件资料摘要:
TL/F/6420
54LS279/DM54LS279/DM74LS279
Quad
S
-R
Latches
May 1989
54LS279/DM54LS279/DM74LS279
Quad S-R Latches
General Description
The ’LS279 consists of four individual and independent Set-
Reset Latches with active low inputs. Two of the four latch-
es have an additonal S input ANDed with the primary S
input. A low on any S input while the R input is high will be
stored in the latch and appear on the corresponding Q out-
put as a high. A low on the R input while the S input is high
will clear the Q output to a low. Simultaneous transistion of
the R and S inputs from low to high will cause the Q output
to be indeterminate. Both inputs are voltage level triggered
and are not affected by transition time of the input data.
Features
Y
Alternate military/aerospace device (54LS279) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6420–1
Order Number 54LS279DMQB, 54LS279FMQB, 54LS279LMQB,
DM54LS279J, DM74LS279M or DM74LS279N
See NS Package Number E20A, J16A, M16A, N16E or W16A
Function Table
Inputs Output
S(1) R Q
LL H*
LH
HL L
HH Q
0
HeHigh Level
L e Low Level
Q
0
e The Level of Q before the indicated input conditions were established.
*This output level is pseudo stable; that is, it may not persist when the S and R
inputs return to their inactive (high) level.
Note 1: For latches with double S inputs:
H e both S inputs high
L e one or both S inputs low
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.