TL/F/8442
54LS244/DM74LS244
Octal
TRI-STATE
Buffers/Line
Drivers/Line
Receivers
August 1989
54LS244/DM74LS244 Octal TRI-STATE
Buffers/Line Drivers/Line Receivers
General Description
These buffers/line drivers are designed to improve both the
performance and PC board density of TRI-STATE buffers/
drivers employed as memory-address drivers, clock drivers,
and bus-oriented transmitters/receivers. Featuring 400 mV
of hysteresis at each low current PNP data line input, they
provide improved noise rejection and high fanout outputs
and can be used to drive terminated lines down to 133X.
Features
Y
TRI-STATE outputs drive bus lines directly
Y
PNP inputs reduce DC loading on bus lines
Y
Hysteresis at data inputs improves noise margins
Y
Typical I
OL
(sink current)
54LS 12 mA
74LS 24 mA
Y
Typical I
OH
(source current)
54LS b12 mA
74LS b15 mA
Y
Typical propagation delay times
Inverting 10.5 ns
Noninverting 12 ns
Y
Typical enable/disable time 18 ns
Y
Typical power dissipation (enabled)
Inverting 130 mW
Noninverting 135 mW
Connection Diagram
Dual-In-Line Package
TL/F/8442–1
Order Number 54LS244DMQB, 54LS244FMQB, 54LS244LMQB,
DM74LS244WM or DM74LS244N
See NS Package Number E20A, J20A, M20B, N20A or W20A
Function Table
Inputs Output
G AY
LL L
LH H
HX Z
LeLow Logic Level
H e High Logic Level
X e Either Low or High Logic Level
Z e High Impedance
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.