© 2000 Fairchild Semiconductor Corporation DS006353 www.fairchildsemi.com
August 1986
Revised March 2000
DM74LS14 Hex Inver
ter

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DM74LS14
Hex Inverter with Schmitt Trigger Inputs
General Description
This device contains six independent gates each of which
performs the logic INVERT function. Each input has hyster-
esis which increases the noise immunity and transforms a
slowly changing input signal to a fast changing, jitter free
output.

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Function Table
Y = A
H = HIGH Logic Level
L = LOW Logic Level
Order Number Package Number Package Description
DM74LS14M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS14SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS14N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Input Output
AY
LH
HL