EEWorld首页 新闻 论坛 博客 白皮书 专题 电子电路 电子器件 单片机 嵌入式 模拟电路 DSP FPGA 电源管理 手机/便携 医疗电子 汽车电子 工业控制
厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

54LS138

器件描述:Decoders/Demultiplexers
器件厂商:NSC [National Semiconductor]
文件大小:165.29KB,共8页
Sponsor by e络盟
器件资料摘要:
TL/F/6391
54LS138/DM54LS138/DM74LS138,54LS139/DM54LS139/DM74LS139
Decoders/Demultiplexers
June 1989
54LS138/DM54LS138/DM74LS138,
54LS139/DM54LS139/DM74LS139
Decoders/Demultiplexers
General Description
These Schottky-clamped circuits are designed to be used in
high-performance memory-decoding or data-routing appli-
cations, requiring very short propagation delay times. In
high-performance memory systems these decoders can be
used to minimize the effects of system decoding. When
used with high-speed memories, the delay times of these
decoders are usually less than the typical access time of the
memory. This means that the effective system delay intro-
duced by the decoder is negligible.
The LS138 decodes one-of-eight lines, based upon the con-
ditions at the three binary select inputs and the three enable
inputs. Two active-low and one active-high enable inputs
reduce the need for external gates or inverters when ex-
panding. A 24-line decoder can be implemented with no ex-
ternal inverters, and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for
demultiplexing applications.
The LS139 comprises two separate two-line-to-four-line de-
coders in a single package. The active-low enable input can
be used as a data line in demultiplexing applications.
All of these decoders/demultiplexers feature fully buffered
inputs, presenting only one normalized load to its driving
circuit. All inputs are clamped with high-performance
Schottky diodes to suppress line-ringing and simplify system
design.
Features
Y
Designed specifically for high speed:
Memory decoders
Data transmission systems
Y
LS138 3-to-8-line decoders incorporates 3 enable in-
puts to simplify cascading and/or data reception
Y
LS139 contains two fully independent 2-to-4-line decod-
ers/demultiplexers
Y
Schottky clamped for high performance
Y
Typical propagation delay (3 levels of logic)
LS138 21 ns
LS139 21 ns
Y
Typical power dissipation
LS138 32 mW
LS139 34 mW
Y
Alternate Military/Aerospace devices (54LS138,
54LS139) are available. Contact a National Semicon-
ductor Sales Office/Distributor for specifications.
Connection Diagrams
Dual-in-Line Package
TL/F/6391–1
Order Number 54LS138DMQB, 54LS138FMQB,
54LS138LMQB, DM54LS138J, DM54LS138W,
DM74LS138M or DM74LS138N
See NS Package Number E20A, J16A,
M16A, N16E or W16A
Dual-in-Line Package
TL/F/6391–2
Order Number 54LS139DMQB, 54LS139FMQB,
54LS139LMQB, DM54LS139J, DM54LS139W,
DM74LS139M or DM74LS139N
See NS Package Number E20A, J16A,
M16A, N16E or W16A
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.