54AC163 • 54ACT163
Synchronous Presettable Binary Counter
General Description
The ’AC/’ACT163 are high-speed synchronous modulo-16
binary counters. They are synchronously presettable for ap-
plication in programmable dividers and have two types of
Count Enable inputs plus a Terminal Count output for versa-
tility in forming synchronous multistage counters. The ’AC/
’ACT163 has a Synchronous Reset input that overrides
counting and parallel loading and allows the outputs to be si-
multaneously reset on the rising edge of the clock.
Features
n I
CC
reduced by 50%
n Synchronous counting and loading
n High-speed synchronous expansion
n Typical count rate of 125 MHz
n Outputs source/sink 24 mA
n ’ACT163 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’AC163: 5962-89582
— ’ACT163: 5962-91723
Logic Symbols
Pin
Names
Description
CEP Count Enable Parallel Input
CET Count Enable Trickle Input
CP Clock Pulse Input
SR Synchronous Reset Input
P
0
–P
3
Parallel Data Inputs
PE Parallel Enable Input
Q
0
–Q
3
Flip-Flop Outputs
TC Terminal Count Output
FACT™ is a trademark of Fairchild Semiconductor Corporation.
DS100275-1
IEEE/IEC
DS100275-2
November 1998
54AC163
•
54ACT163
Synchronous
Presettable
Binary
Counter
© 1998 National Semiconductor Corporation DS100275 www.national.com