54ABT652
Octal Transceivers and Registers with TRI-STATE
®
Outputs
General Description
The ’ABT652 consists of bus transceiver circuits with D-type
flip-flops, and control circuitry arranged for multiplexed trans-
mission of data directly from the input bus or from the inter-
nal registers. Data on the A or B bus will be clocked into the
registers as the appropriate clock pin goes to HIGH logic
level. Output Enable pins (OEAB, OEBA) are provided to
control the transceiver function.
Features
n Independent registers for A and B buses
n Multiplexed real-time and stored data
n A and B output sink capability of 48 mA, source
capability of 24 mA
n Guaranteed latchup protection
n High impedance glitch free bus loading during entire
power up and power down cycle
n Nondestructive hot insertion capability
n Standard Microcircuit Drawing (SMD) 5962-9324201
Ordering Code:
Commercial Package Package Description
Number
54ABT652J-QML J24A 24-Lead Ceramic Dual-in-line
54ABT652W-QML W24C 24-Lead Cerpack
54ABT652E-QML E28A 28-Lead Ceramic Leadless Chip Carrier, Type C
Connection Diagram
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
Pin Assignment for
DIP and Flatpack
DS100220-1
August 1998
54ABT652
Octal
T
ransceivers
and
Registers
with
TRI-ST
A
T
E
Outputs
© 1998 National Semiconductor Corporation DS100220 www.national.com